SJ BIST™ Intermittency Detection

Cracked Solder Ball

Cracked Solder Ball

Intermittent and catastrophic faults in electronic control systems can now be avoided with Ridgetop Group’s SJ BIST™. The SJ BIST (Solder Joint Built-In Self-Test) technology accurately detects and reports instances of high resistance, including intermittent opens, in field programmable gate arrays (FPGAs)-to-board interfaces. connectors and cables, and other high density electrical interconnection systems. In addition, SJ BIST is used for detecting cracks in IC substrates and IC package qualification. SJ BIST is part of the Sentinel Interconnect™ family of products.

Solder joints and other physical connections are subject to mechanical failure; they inevitably suffer damage from thermal and vibration stresses, causing troublesome intermittent connections between components on the boards. The ability to measure, detect, and predict solder aging and the resultant failure of electronic modules is a true advancement in electronics reliability.

SJ BIST Features

  • Detects damage prior to catastrophic failure of FPGA-to-board interface
  • Independently tested and verified
  • Works with new processes and equipment
  • Endorsed by leading automotive and aerospace customers
SJ BIST two port test

SJ BIST two-port test, 1 MHz clock – click to enlarge

For more information, contact us directly, or follow the links below.


Product Brief

Selected White Papers

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HALT Evaluation of SJBIST Technology for Electronic Prognostics
This paper presents the design, test, and results of a highly accelerated life test (HALT) evaluation of a soft-core called Solder Joint Built-in Self-Test™ (SJ BIST™), a method for detecting faults caused by solder-joint fractures in monitored input/output (I/O) pins of field programmable gate array (FPGA) devices, especially those in ball grid array (BGA) packages.
A Low-Power Sensor Design, SJ Monitoring 24x7 the Health of BGA Solder Joints
Ridgetop introduces a low-power sensor design, SJ Monitor™, which uses innovative circuit design on an IC chip in-situ on an FPGA’s board to provide a method to monitor 8 I/O pins 24x7 for solder-joint faults and which uses less than 5.0 mW. SJ Monitor is able to detect all solder joint faults of at least 100Ω (sensitivity) that last at least as long as 15 ns (resolution)—with no false alarms. The complementary form of SJ Monitor™ can be used to monitor the pins of powered-off FPGAs.

Related Products


  • Interconnect Intermittency Detection with SJ BIST™ – Broadcast by Microsemi

Click here to download the webinar presentation (PPTX)
Click here to view the audio/video recording of the webinar