ProChek™ Semiconductor Process Reliability Characterization System

IMG_1444_ProChek box-nothing on top

Ridgetop Group’s ProChek™

Whether you work at a semiconductor foundry, a fabless integrated circuit (IC) vendor, or an application-specific IC (ASIC) design house, you need to know the characteristics of the fabrication processes that you use for your chips. Foundries and integrated device manufacturers (IDMs) need precise measurements as they develop and qualify new processes or monitor the performance, yield, and reliability of existing ones. Fabless IC and ASIC companies want design-specific variation and mismatch data to optimize their circuit performance, as well as reliability information that pertains to the particular device geometries in their circuit under expected operating and environmental conditions. Sometimes radiation effects must be considered along with other, intrinsic wear-out factors based on the particular fabrication process. Gathering such information can be quite tedious and – worse – expensive.

What ProChek Measures

With multiple stress-and-measurement units (SMUs) inside an ultra-compact unit, ProChek is well-suited to measuring the wide array of degradation and yield-limiting effects of concern in today’s advanced process nodes:

  • Negative/positive bias temperature instability (NBTI/PBTI), including on-the-fly measurement (see the application note)
  • Hot carrier injection (HCI)
  • Time-dependent dielectric breakdown (TDDB)
  • Stress migration (SM)
  • Electromigration (EM)
  • Threshold voltage (VT) shift
  • Total ionizing dose (TID) radiation
  • Device-level mismatch

ProChek interface software is equally up to the task, with many preset “scenarios” simply awaiting you to supply a few setup and operating parameters before you hit the “Start” button.

Sample ProChek test scenario

Sample ProChek test scenario – click to enlarge

ProChek Configurations

ProChek can be used in a variety of ways, depending on your application. The graphic below shows the flexibility of the system to meet a range of needs.

ProChek system graphic

ProChek system – click to enlarge

Using Standard Test Structures

Despite its amazingly compact form factor, ProChek incorporates multiple SMUs, effectively replacing racks of test and measurement equipment and floor-space-eating automated test equipment (ATE). As a result, it is well-suited for wafer-level reliability (WLR) and package-level reliability applications using your existing or newly designed test structures.

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ProChek in a wafer-level reliability (WLR) application – click to enlarge

Using a ProChek Test Coupon

Further enhancing the cost-effectiveness of the system, ProChek can dramatically accelerate the test process with a specially designed test coupon. How does that work? The ProChek test platform controls and observes the ProChek test coupon you have fabricated in your process with your embedded circuit components (e.g., a large array of transistors with widths/lengths you specify). With patent-pending technology, the test system stresses devices-under-test (DUTs) on the test coupon. The built-in die-level structures control the voltage and the temperature for each device. (You can even put the test coupon in a radiation chamber.)

ProChek Integrated Test Coupon block diagram - click to enlarge

ProChek Integrated Test Coupon block diagram – click to enlarge

In a matter of days or even hours, you have collected the reliability data for troublesome deep- submicron (DSM) effects.

Ridgetop will help you design your test coupon. We have done this on processes from IBM (now GlobalFoundries), TSMC, TowerJazz, and ON Semiconductor, and we are constantly adding support for new processes. Let Ridgetop help you gather the process characterization you need now.

Contact us directly for more information, or visit the links below.

Product briefs

Webinars

  • Innovative Wafer-Level Reliability Methods using ProChek™
    • Click here to download Dr. McPherson’s webinar presentation (PDF)
    • Click here to download Dr. Manhaeve’s webinar presentation (PDF)
    • Click here to download the audio/video recording of the webinar (ASF)
  • Rapid Collection of Device-Level Reliability Data
    • Click here to download the webinar presentation (PDF)
    • Click here to download the audio/video recording of the webinar (WMV)
  • BEOL Reliability of Nanoelectronic Devices
    • Click here to download the webinar presentation (PDF)
    • Click here to download the audio/video recording of the webinar (WMV)
  • Semiconductor Fabrication Process Characterization Challenges 
    • Click here to download the webinar presentation (PDF)
    • Click here to download the audio/video recording of the webinar (WMV)
  • IC Characterization with ProChek, a Compact Benchtop System
    • Click here to download the webinar presentation (PDF)

White papers

Application notes

Related products

News

Click here to contact us directly for more information.