Solder joints in field programmable gate arrays (FPGAs) in ball grid array (BGA) packages are especially subject to cumulative fatigue damage. SJ Monitor™ is one of three methods developed by Ridgetop Group, Inc., for detecting high-resistance faults in functional solder-joint networks in programmed FPGAs.
SJ Monitor is designed to detect occurrences of high-resistance spikes at BGA pins, and to then alert the system regarding the condition of the solder joints. Maintenance is thus facilitated, either through replacement or by switching to a redundant system, prior to catastrophic failure.
Features and Benefits
- Analog sensors within an integrated circuit (IC) chip detect incipient fatigue damage to dedicated pins of FPGAs
- Detects damage prior to catastrophic failure of FPGA
- Improves fault coverage without significantly increasing complexity of system
- Improves fault coverage for Advanced Redundancy Management without using redundancy techniques
- Provides positive correlation of hardware faults to intermittencies
